Conventional EPROM devices are structured such that a control gate overlies a plurality of floating gates which are disposed between bitlines formed in a semiconductor surface. To program a standard EPROM memory cell, a voltage of approximately 14 volts is applied to the control gate and a voltage of approximately 10 volts is applied to one of the source/drain regions while the other source/drain is held at ground. The voltage on the control gate results in a depletion region between the two source/drain regions. When one source/drain is pulsed at 10 volts, a flow of electrons between source/drain regions the charge on the control gate, some of the electrons flowing between the source/drain regions will gain sufficient energy to penetrate an oxide layer and drift into the floating gate. This process is often termed "hot-electron channel injection."
The rate at which electrons are attracted to the floating gate will depend upon the coupling between the floating gate and the control gate. A higher degree of coupling will produce a higher voltage on the floating gate, resulting in a greater number of electrons attracted thereto.
In conventional EEPROM devices, a thin tunnel oxide window is positioned in the gate dielectric near the source or drain region. To program the cell, the gate is pulsed to a voltage of approximately 17 volts while the source or drain is held at ground. The high electric field generated across the thin tunnel oxide causes a current to flow due to Fowler-Nordheim tunneling which charges the floating gate with electrons.
In both EPROMs and EEPROMs, higher coupling between the control gate and the floating gate increases the electric field across the gate oxide enhancing programming.
Typically, coupling between the control gate and the floating gate is on the order of 0.65-0.70. By increasing the coupling, the programmability of the device is improved, and therefore, a lower programming voltage may be used.
In order to increase coupling, present-day EPROMs and EEPROMs use a floating gate which extends over a thick oxide to maximize the area between the control gate and the floating gate. However, a fairly strong coupling component exists between the floating gate and the underlying substrate. Thus, a long floating gate also produces a high capacitance between the floating gate and the substrate, thereby negating some of the beneficial effects of a long floating gate. Additionally, extending the floating gate over the field oxide greatly increases the size of the cell.
Therefore, a need has arisen to provide a non-volatile memory with improved coupling within a small area between the floating gate and the control gate to enhance programmability.